As known in the art, most computer systems employ a system clock which is a crystal oscillator that provides a clock signal to control the timing of various functionality within the computer system. For example, many computer systems latch data on a rising edge of the system clock signal. However, not all timing relationships are determined by the system clock signal. A computer system might latch data into and out of the address and status bus, for example, on every rising edge of the clock signal while latching data into and out of the data bus with strobes occurring at a different frequency than the transitions of the system clock signal.
Unlike the system clock signal which continuously oscillates during the operation of the computer system, the strobe signals can be controlled. Therefore, as known in the art, a strobe signal may latch data during one time interval and produce no strobes during another time interval. However, during the time intervals when the strobe signal is generated and, thereby, latching data, the strobes typically latch data at a rate corresponding to a fraction of the system clock signal. Therefore, a predetermined number of strobes occurs for every cycle of the system clock signal during intervals when the strobe signal is active. Furthermore, it should be noted that the occurrence of intervals of active strobes usually bears no relation to the system clock signal.
As known in the art, there usually exists a delay in the occurrence of a rising edge of the system clock signal and in the occurrence of a corresponding strobe signal. Therefore, a difference exists in the phase relationship of a strobe and of an occurrence of an edge of the system clock signal. Accordingly, the data signal output from the data bus in response to strobe signals is not synchronized with respect to the system clock signal.
Further, if there are multiple transmitters of the strobe signal taking turns generating the strobes, then the phase relationship between the clock and strobes may change depending on which device is transmitting the strobe. In addition, the data signals which are latched with the strobes are typically generated by the same device that is generating the strobes. Therefore, the timing of the data signal latched by the strobes corresponds with the strobes, but the timing of the data signal typically changes with respect to the system clock.
However, it is often desirable for the data signals to be synchronized with the system clock signal for further processing within the computer system. Accordingly, in most applications, the data signals should be synchronized with respect to the system clock signal once the data signals have been latched off of the data bus. Since the delays between the data bus strobes and transitions of the system clock signal vary depending on which chip is generating the data and the strobes, any solution for resynchronizing data signals and system clock signals based on a specific time delay or phase delay is not always successful.
Thus, a heretofore unaddressed need exists in the industry for providing a system and method of reliably resynchronizing one signal with respect to another signal.